)]}'
{
  "commit": "e100aec4f957f3516e035862f8943e6ff023eefc",
  "tree": "c3f6a52adc74bd34d61e6f0b96a19ada40f7e1f5",
  "parents": [
    "b3109e4ad6fab52505b482f5467ad8a7808b4686"
  ],
  "author": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Thu Sep 10 08:06:46 2026 +0000"
  },
  "committer": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Thu Sep 10 08:06:46 2026 +0000"
  },
  "message": "Deploying to gh-pages from @ chipsalliance/verible@682a1d502d749ced074537a14aba4f15076dd668 🚀\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f76372c4b18aca77d9d0f2fe89c7e8b3bf86320d",
      "old_mode": 33188,
      "old_path": "README.md",
      "new_id": "960e843b3a308151edeac78c926a820231f4962f",
      "new_mode": 33188,
      "new_path": "README.md"
    },
    {
      "type": "modify",
      "old_id": "c2aa217b8917f33520553aab8c823d185652a618",
      "old_mode": 33188,
      "old_path": "index.md",
      "new_id": "86d4d78a2076e6167ab8995b0f274f68b205032d",
      "new_mode": 33188,
      "new_path": "index.md"
    },
    {
      "type": "modify",
      "old_id": "6849059309e3bddfad56288292f049fac303dcda",
      "old_mode": 33188,
      "old_path": "lint.md",
      "new_id": "e18c5b4788c2f4801d3fc9c1a23abffd0a465f86",
      "new_mode": 33188,
      "new_path": "lint.md"
    },
    {
      "type": "modify",
      "old_id": "2442983c5e12889c481cb0d9cf421e4525b38476",
      "old_mode": 33188,
      "old_path": "verilog_format.md",
      "new_id": "b485535b55c03a9e4f5421c884864519b33e17ff",
      "new_mode": 33188,
      "new_path": "verilog_format.md"
    },
    {
      "type": "modify",
      "old_id": "eeef0e4dadbbf11a88cf12329abae70339638173",
      "old_mode": 33188,
      "old_path": "verilog_lint.md",
      "new_id": "8251044b7d79a4d1b73aa63274859bda13beaf79",
      "new_mode": 33188,
      "new_path": "verilog_lint.md"
    },
    {
      "type": "modify",
      "old_id": "b27ca3c0853f249767f08837ea74db071368371b",
      "old_mode": 33188,
      "old_path": "verilog_syntax.md",
      "new_id": "8c8440e2580e07a95236e6e2108de46ac78771a7",
      "new_mode": 33188,
      "new_path": "verilog_syntax.md"
    }
  ]
}
