)]}'
{
  "id": "eda47bc6f2bf52568a6f356420543828fb4ca8c9",
  "repo": "third_party/verible",
  "revision": "e2f5318e4eca85f65dbfcfb9228f3d63e0392286",
  "path": "verilog/CST/module.h"
}
