)]}'
{
  "id": "91a8c1ab67e87b8e61c3828ccb73d4cced4dfe1b",
  "repo": "third_party/verible",
  "revision": "e2f5318e4eca85f65dbfcfb9228f3d63e0392286",
  "path": "verilog/analysis/BUILD"
}