)]}'
{
  "id": "a7f66aa3c64f27a32794de8f0d70dea68a7ba0e0",
  "repo": "third_party/verible",
  "revision": "e2f5318e4eca85f65dbfcfb9228f3d63e0392286",
  "path": "verilog/analysis/checkers/void_cast_rule.cc"
}