)]}'
{
  "id": "0c6e44792ba23f81d88c6bb2cbfb1ae1a3c91234",
  "repo": "third_party/verible",
  "revision": "e2f5318e4eca85f65dbfcfb9228f3d63e0392286",
  "path": "verilog/preprocessor/BUILD"
}