)]}'
{
  "id": "ab5d03414bb7bfb381f4c209b4a1ee564172964c",
  "repo": "third_party/verible",
  "revision": "e2f5318e4eca85f65dbfcfb9228f3d63e0392286",
  "path": "verilog/tools/kythe/scope_resolver.h"
}