)]}'
{
  "commit": "f5e04028779cf65dc52d9f74eb2fc3895ae5c682",
  "tree": "53a698fb814ae4e3120aa3f9c79aa5ec57ba92b4",
  "parents": [
    "e9d27cc0fb4d361505ec6563bd4f7b285b58643f"
  ],
  "author": {
    "name": "Kalen Brunham",
    "email": "kalen.brunham@intel.com",
    "time": "Mon Sep 14 12:39:13 2026 +0000"
  },
  "committer": {
    "name": "Kalen Brunham",
    "email": "kalen.brunham@intel.com",
    "time": "Mon Sep 14 12:39:13 2026 +0000"
  },
  "message": "Fix timescale CRLF // comments leaving CR in the token.\n\nTIMESCALE_DIRECTIVE used yyless(yyleng-1), so CRLF comments kept `\\r` and the formatter emitted `\\r\\r\\n` (issue #2605).\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b1f378884c87f58197c8ecd9203fc9a560320321",
      "old_mode": 33188,
      "old_path": "verible/verilog/parser/verilog-lexer_test.cc",
      "new_id": "cc18f987674e8b469b301f6cc7e7d83114d3d6e0",
      "new_mode": 33188,
      "new_path": "verible/verilog/parser/verilog-lexer_test.cc"
    },
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "verible/verilog/parser/verilog.lex",
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}