)]}'
{
  "commit": "fb1a5e6aab7a444f306deff9e010319b224c7e37",
  "tree": "a7c87b060f535137c4b43165def81fb50bbda3c1",
  "parents": [
    "e8344a8a95be17e095db15635c0236ef2e756286"
  ],
  "author": {
    "name": "Kalen Brunham",
    "email": "kalen.brunham@intel.com",
    "time": "Mon Aug 17 23:54:02 2026 +0000"
  },
  "committer": {
    "name": "Kalen Brunham",
    "email": "kalen.brunham@intel.com",
    "time": "Mon Aug 17 23:54:02 2026 +0000"
  },
  "message": "Extract whitespace-dependent format equivalence predicate\n\nFactor MacroCallCloseToEndLine/\u0027)\u0027 and MacroIdentifier/MacroIdItem\nmatching into TokensAreWhitespaceDependentFormatEquivalent(), reusing\nit in LexicallyEquivalent and FormatEquivalent (PR review feedback).\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "026c197cf257c99b38b77c5c88cf4d81cbcc2fed",
      "old_mode": 33188,
      "old_path": "verible/verilog/analysis/verilog-equivalence.cc",
      "new_id": "97c8da2d9c272ba861d6e96f094a9be7330e5c51",
      "new_mode": 33188,
      "new_path": "verible/verilog/analysis/verilog-equivalence.cc"
    }
  ]
}