)]}'
{
  "id": "e5e8a05ae4d94be4c3cb6ba57b381b96bbf8f63c",
  "repo": "third_party/verible",
  "revision": "ad1018038d43f337d88e79ef2e8d3b58359299a4",
  "path": "verilog/analysis/README.md"
}
