# [bench_name] [top-level clk name]  filelist for regression tests assumed filename is *.map4.blif 
or1200				clk
diffeq1         	clk
diffeq2         	clk
ch_intrinsics   	clk
stereovision0   	tm3_clk_v0
stereovision1   	tm3_clk_v0
stereovision2   	tm3_clk_v0 
stereovision3   	tm3_clk_v0 
spree           	clk
raygentop       	tm3_clk_v0 
boundtop        	tm3_clk_v0 
sha             	clk_i 
mkPktMerge      	CLK
mkSMAdapter4B   	wciS0_Clk
mkDelayWorker32B	wciS0_Clk
blob_merge      	clk
reed_solomon    	clk
mcml            	clk
render          	i_clk100
fpu_full_unit   	clk 
fpu_add_only    	clk 
fpu_div_only    	clk 
fpu_mul_only    	clk 
lu32peng        	clk
lu64peng        	clk
topLU_16        	clk
topLU_3         	clk
topLU_32        	clk
topLU_64        	clk
bgm					clock
LU32PEEng			clk
LU8PEEng			clk
LU64PEEng			clk
bfly				clock
carrychain			clock
dscg				clock
fir					clock
mm3					clock
ode					clock
syn2				clock
syn7				clock