.model top
.inputs bbtas_in_0_ bbtas_in_1_ clock
.outputs bbtas_out_1_ bbtas_out_0_
.latch    n_n16 n_n38 re clock 2
.latch    n_n17 n_n39 re clock 2
.latch    n_n18 n_n40 re clock 2
.names bbtas_in_1_ n_n39 n_n40 bbtas_out_1_
101 1
.names bbtas_in_0_ n_n39 n_n40 bbtas_out_0_
101 1
.names [16] [77] [78] n_n16
--1 1
11- 1
.names [10] [15] [79] n_n17
--1 1
11- 1
.names [10] [13] [17] n_n18
01- 1
1-1 1
.names bbtas_in_0_ bbtas_in_1_ [10]
1- 1
-1 1
.names n_n38 n_n39 [13]
11 1
.names n_n39 n_n40 [14]
01 1
.names n_n38 n_n39 n_n40 [15]
1-- 1
-11 1
.names bbtas_in_0_ bbtas_in_1_ n_n39 [16]
1-0 1
-10 1
001 1
.names n_n38 n_n39 n_n40 [17]
--1 1
01- 1
.names n_n40 n_n38 [77]
00 1
.names [10] [13] [14] [78]
11- 1
0-1 1
.names [10] [13] [14] [79]
-1- 1
0-1 1
.end