)]}'
{
  "id": "04ae4983bf405b62f45dc5ba856491843f6b9815",
  "repo": "third_party/vtr-verilog-to-routing",
  "revision": "4c084aa1e09afd1127ebbcec63a5cfd6a2eb3b78",
  "path": "libarchfpga/Makefile"
}