)]}'
{
  "id": "507f370c51437c1fce354665cd96b319ee7fc570",
  "repo": "third_party/vtr-verilog-to-routing",
  "revision": "624c84315081e40efde19caa8a38f38a0b3e0e16",
  "path": "doc/src/arch/fpga_grid_example.pdf"
}
