)]}'
{
  "id": "5cf4057bc5c493bde0215ae37abf61f0f8dbbfad",
  "repo": "third_party/vtr-verilog-to-routing",
  "revision": "624c84315081e40efde19caa8a38f38a0b3e0e16",
  "path": "doc/src/arch/single_fpga_grid.pdf"
}