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foss-fpga-tools / third_party / vtr-verilog-to-routing / a2c37c91c9836429efe18a8bd6fd68bc656e32b7 / . / doc / src / arch
tree: eca4b5a80ccff72c3764725a4d7dfbce8f55fe99 [path history] [tgz]
  1. blank_fpga_grid.pdf
  2. blank_fpga_grid.svg
  3. channel_distribution.png
  4. col_fpga_grid.pdf
  5. col_fpga_grid.svg
  6. col_perim_fpga_grid.pdf
  7. col_perim_fpga_grid.svg
  8. complete_example.png
  9. corners_fpga_grid.pdf
  10. corners_fpga_grid.svg
  11. direct_example.png
  12. example_arch.rst
  13. example_arch.xml
  14. fill_fpga_grid.pdf
  15. fill_fpga_grid.svg
  16. fpga_grid_example.pdf
  17. fpga_grid_example.svg
  18. index.rst
  19. ipin_diagram.png
  20. mux_example.png
  21. pack_pattern_example.png
  22. perimeter_fpga_grid.pdf
  23. perimeter_fpga_grid.svg
  24. reference.rst
  25. region_incr_fpga_grid.pdf
  26. region_incr_fpga_grid.svg
  27. region_incr_mesh_fpga_grid.pdf
  28. region_incr_mesh_fpga_grid.svg
  29. region_repeat_fpga_grid.pdf
  30. region_repeat_fpga_grid.svg
  31. region_single_fpga_grid.pdf
  32. region_single_fpga_grid.svg
  33. row_fpga_grid.pdf
  34. row_fpga_grid.svg
  35. sb_locations.pdf
  36. sb_locations.svg
  37. sb_pattern.png
  38. sb_types.pdf
  39. sb_types.svg
  40. single_fpga_grid.pdf
  41. single_fpga_grid.svg
  42. switch_point_diagram.png
  43. wireconn_num_conns_type_from.pdf
  44. wireconn_num_conns_type_from.svg
  45. wireconn_num_conns_type_max.pdf
  46. wireconn_num_conns_type_max.svg
  47. wireconn_num_conns_type_min.pdf
  48. wireconn_num_conns_type_min.svg
  49. wireconn_num_conns_type_to.pdf
  50. wireconn_num_conns_type_to.svg