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foss-fpga-tools / third_party / vtr-verilog-to-routing / a2c37c91c9836429efe18a8bd6fd68bc656e32b7 / . / vtr_flow / benchmarks / arithmetic / arch / resizable_sources
tree: 68d15ece60fbe43661888a75b80b70a480ac7923 [path history] [tgz]
  1. k6_N8_gate_boost_0.2V_22nm_resizable.xml
  2. k6_N8_lookahead_chain_gate_boost_0.2V_22nm_resizable.xml
  3. k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm_resizable.xml
  4. k6_N8_ripple_chain_gate_boost_0.2V_22nm_resizable.xml
  5. k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm_resizable.xml
  6. nointerclb_k6_N8_lookahead_chain_gate_boost_0.2V_22nm_resizable.xml
  7. nointerclb_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm_resizable.xml
  8. nointerclb_k6_N8_ripple_chain_gate_boost_0.2V_22nm_resizable.xml
  9. nointerclb_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm_resizable.xml
  10. xbar0.125_resizable.xml
  11. xbar0.25_resizable.xml
  12. xbar0.5_resizable.xml
  13. xbar1_resizable.xml
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