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foss-fpga-tools / third_party / vtr-verilog-to-routing / ab6fce0240a40137d79950f67dfee50a94c895c1 / . / vtr_flow / tasks / regression_tests / vtr_reg_strong
tree: 4f64fed583a058b57ac89c470a28c087366e4b23 [path history] [tgz]
  1. strong_analysis_only/
  2. strong_bounding_box/
  3. strong_breadth_first/
  4. strong_constant_outputs/
  5. strong_custom_grid/
  6. strong_custom_pin_locs/
  7. strong_custom_switch_block/
  8. strong_default_fc_pinlocs/
  9. strong_eblif_vpr/
  10. strong_echo_files/
  11. strong_fc_abs/
  12. strong_fix_pins_pad_file/
  13. strong_fix_pins_random/
  14. strong_flyover_wires/
  15. strong_fpu_hard_block_arch/
  16. strong_fracturable_luts/
  17. strong_func_formal_flow/
  18. strong_func_formal_vpr/
  19. strong_global_routing/
  20. strong_manual_annealing/
  21. strong_mcnc/
  22. strong_minimax_budgets/
  23. strong_multiclock/
  24. strong_no_timing/
  25. strong_pack/
  26. strong_pack_and_place/
  27. strong_power/
  28. strong_route_only/
  29. strong_scale_delay_budgets/
  30. strong_sweep_constant_outputs/
  31. strong_timing/
  32. strong_titan/
  33. strong_verify_rr_graph/
  34. task_list.txt