Removed num_rr_nodes and used rr_nodes.size() instead
- changed for loop counter variables type to size_t
- needed to do some casts when comparing an index of rr_nodes to
that of a signed variable that was functionally couldn't be
changed to unsigned
(cherry picked from commit 7835784e16c52abf469e4a54ed17feb540bf4664)
diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h
index 517c83d..df5743d 100644
--- a/vpr/src/base/vpr_context.h
+++ b/vpr/src/base/vpr_context.h
@@ -128,8 +128,7 @@
t_chan_width chan_width;
/* Structures to define the routing architecture of the FPGA. */
- int num_rr_nodes;
- std::vector<t_rr_node> rr_nodes; /* [0..num_rr_nodes-1] */
+ std::vector<t_rr_node> rr_nodes; /* autogenerated in build_rr_graph */
int num_rr_indexed_data;
t_rr_indexed_data *rr_indexed_data; /* [0 .. num_rr_indexed_data-1] */
diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp
index a5e41ef..c0dc5aa 100644
--- a/vpr/src/draw/draw.cpp
+++ b/vpr/src/draw/draw.cpp
@@ -764,7 +764,7 @@
/* Space is allocated for draw_rr_node but not initialized because we do *
* not yet know information about the routing resources. */
draw_state->draw_rr_node = (t_draw_rr_node *) vtr::malloc(
- device_ctx.num_rr_nodes * sizeof(t_draw_rr_node));
+ device_ctx.rr_nodes.size() * sizeof(t_draw_rr_node));
draw_state->arch_info = arch;
@@ -808,10 +808,10 @@
/* Each time routing is on screen, need to reallocate the color of each *
* rr_node, as the number of rr_nodes may change. */
- if (device_ctx.num_rr_nodes != 0) {
+ if (device_ctx.rr_nodes.size() != 0) {
draw_state->draw_rr_node = (t_draw_rr_node *) vtr::realloc(draw_state->draw_rr_node,
- (device_ctx.num_rr_nodes) * sizeof(t_draw_rr_node));
- for (int i = 0; i < device_ctx.num_rr_nodes; i++) {
+ (device_ctx.rr_nodes.size()) * sizeof(t_draw_rr_node));
+ for (size_t i = 0; i < device_ctx.rr_nodes.size(); i++) {
draw_state->draw_rr_node[i].color = DEFAULT_RR_NODE_COLOR;
draw_state->draw_rr_node[i].node_highlighted = false;
}
@@ -1091,8 +1091,8 @@
float min_cost = std::numeric_limits<float>::infinity();
float max_cost = -min_cost;
- std::vector<float> rr_node_costs(device_ctx.num_rr_nodes, 0.);
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ std::vector<float> rr_node_costs(device_ctx.rr_nodes.size(), 0.);
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
float cost = 0.;
if ( draw_state->show_routing_costs == DRAW_TOTAL_ROUTING_COSTS
|| draw_state->show_routing_costs == DRAW_LOG_TOTAL_ROUTING_COSTS) {
@@ -1149,7 +1149,7 @@
//Draw the nodes in ascending order of value, this ensures high valued nodes
//are not overdrawn by lower value ones (e.g. when zoomed-out far)
- std::vector<int> nodes(device_ctx.num_rr_nodes);
+ std::vector<int> nodes(device_ctx.rr_nodes.size());
std::iota(nodes.begin(), nodes.end(), 0);
auto cmp_ascending_cost = [&](int lhs_node, int rhs_node) {
return rr_node_costs[lhs_node] < rr_node_costs[rhs_node];
@@ -1244,8 +1244,6 @@
t_draw_state* draw_state = get_draw_state_vars();
auto& device_ctx = g_vpr_ctx.device();
- int inode;
-
if (draw_state->draw_rr_toggle == DRAW_NO_RR || draw_state->draw_rr_toggle == DRAW_MOUSE_OVER_RR) {
setlinewidth(3);
drawroute(HIGHLIGHTED);
@@ -1255,7 +1253,7 @@
setlinestyle(SOLID);
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
if (!draw_state->draw_rr_node[inode].node_highlighted)
{
/* If not highlighted node, assign color based on type. */
@@ -2364,7 +2362,6 @@
* de-highlight its fan_in and fan_out.
*/
static void draw_highlight_fan_in_fan_out(const std::set<int>& nodes) {
- int inode;
t_draw_state* draw_state = get_draw_state_vars();
auto& device_ctx = g_vpr_ctx.device();
@@ -2386,7 +2383,7 @@
}
/* Highlight the nodes that can fanin to this node in blue. */
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
for (int iedge = 0, l = device_ctx.rr_nodes[inode].num_edges(); iedge < l; iedge++) {
int fanout_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
if (fanout_node == node) {
@@ -2414,14 +2411,13 @@
* It returns the hit RR node's ID (or OPEN if no hit)
*/
static int draw_check_rr_node_hit (float click_x, float click_y) {
- int inode;
int hit_node = OPEN;
t_bound_box bound_box;
t_draw_coords* draw_coords = get_draw_coords_vars();
auto& device_ctx = g_vpr_ctx.device();
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
switch (device_ctx.rr_nodes[inode].type()) {
case IPIN:
case OPIN:
@@ -2755,7 +2751,6 @@
t_draw_state* draw_state = get_draw_state_vars();
auto& cluster_ctx = g_vpr_ctx.clustering();
auto& device_ctx = g_vpr_ctx.device();
- int i;
/* Create some colour highlighting */
for (auto blk_id : cluster_ctx.clb_nlist.blocks()) {
@@ -2765,7 +2760,7 @@
for (auto net_id : cluster_ctx.clb_nlist.nets())
draw_state->net_color[net_id] = BLACK;
- for (i = 0; i < device_ctx.num_rr_nodes; i++) {
+ for (size_t i = 0; i < device_ctx.rr_nodes.size(); i++) {
draw_state->draw_rr_node[i].color = DEFAULT_RR_NODE_COLOR;
draw_state->draw_rr_node[i].node_highlighted = false;
}
@@ -3621,7 +3616,7 @@
auto& device_ctx = g_vpr_ctx.device();
vtr::Matrix<float> avail({{device_ctx.grid.width(), device_ctx.grid.height()}}, 0.);
- for (int inode = 0; inode < device_ctx.num_rr_nodes; ++inode) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); ++inode) {
auto& rr_node = device_ctx.rr_nodes[inode];
if (rr_node.type() == CHANX && rr_type == CHANX) {
diff --git a/vpr/src/draw/draw_types.h b/vpr/src/draw/draw_types.h
index 980a2c5..fa25161 100644
--- a/vpr/src/draw/draw_types.h
+++ b/vpr/src/draw/draw_types.h
@@ -136,7 +136,7 @@
* draw_rr_node: stores the state information of each routing resource.
* Used to control drawing each routing resource when
* ROUTING is on screen.
- * [0..device_ctx.num_rr_nodes-1]
+ * [0..device_ctx.rr_nodes.size()-1]
*/
struct t_draw_state {
pic_type pic_on_screen = NO_PICTURE;
diff --git a/vpr/src/power/power.cpp b/vpr/src/power/power.cpp
index 88b2120..8954dd3 100644
--- a/vpr/src/power/power.cpp
+++ b/vpr/src/power/power.cpp
@@ -787,7 +787,6 @@
*/
static void power_usage_routing(t_power_usage * power_usage,
const t_det_routing_arch * routing_arch, t_segment_inf * segment_inf) {
- int rr_node_idx;
int edge_idx;
auto& power_ctx = g_vpr_ctx.power();
auto& cluster_ctx = g_vpr_ctx.clustering();
@@ -803,7 +802,7 @@
power_ctx.commonly_used->total_cb_buffer_size = 0.;
/* Reset rr graph net indices */
- for (rr_node_idx = 0; rr_node_idx < device_ctx.num_rr_nodes; rr_node_idx++) {
+ for (size_t rr_node_idx = 0; rr_node_idx < device_ctx.rr_nodes.size(); rr_node_idx++) {
rr_node_power[rr_node_idx].net_num = ClusterNetId::INVALID();
rr_node_power[rr_node_idx].num_inputs = 0;
rr_node_power[rr_node_idx].selected_input = 0;
@@ -864,7 +863,7 @@
}
/* Calculate power of all routing entities */
- for (rr_node_idx = 0; rr_node_idx < device_ctx.num_rr_nodes; rr_node_idx++) {
+ for (size_t rr_node_idx = 0; rr_node_idx < device_ctx.rr_nodes.size(); rr_node_idx++) {
t_power_usage sub_power_usage;
auto node = &device_ctx.rr_nodes[rr_node_idx];
t_rr_node_power * node_power = &rr_node_power[rr_node_idx];
@@ -1161,7 +1160,6 @@
}
void power_routing_init(const t_det_routing_arch * routing_arch) {
- int rr_node_idx;
int max_fanin;
int max_IPIN_fanin;
int max_seg_to_IPIN_fanout;
@@ -1182,9 +1180,9 @@
}
/* Initialize RR Graph Structures */
- rr_node_power = (t_rr_node_power*) vtr::calloc(device_ctx.num_rr_nodes,
+ rr_node_power = (t_rr_node_power*) vtr::calloc(device_ctx.rr_nodes.size(),
sizeof(t_rr_node_power));
- for (rr_node_idx = 0; rr_node_idx < device_ctx.num_rr_nodes; rr_node_idx++) {
+ for (size_t rr_node_idx = 0; rr_node_idx < device_ctx.rr_nodes.size(); rr_node_idx++) {
rr_node_power[rr_node_idx].driver_switch_type = OPEN;
}
@@ -1194,7 +1192,7 @@
max_IPIN_fanin = 0;
max_seg_to_seg_fanout = 0;
max_seg_to_IPIN_fanout = 0;
- for (rr_node_idx = 0; rr_node_idx < device_ctx.num_rr_nodes; rr_node_idx++) {
+ for (size_t rr_node_idx = 0; rr_node_idx < device_ctx.rr_nodes.size(); rr_node_idx++) {
int switch_idx;
int fanout_to_IPIN = 0;
int fanout_to_seg = 0;
@@ -1247,7 +1245,7 @@
#endif
/* Populate driver switch type */
- for (rr_node_idx = 0; rr_node_idx < device_ctx.num_rr_nodes; rr_node_idx++) {
+ for (size_t rr_node_idx = 0; rr_node_idx < device_ctx.rr_nodes.size(); rr_node_idx++) {
auto node = &device_ctx.rr_nodes[rr_node_idx];
int edge_idx;
@@ -1264,7 +1262,7 @@
/* Find Max Fanout of Routing Buffer */
max_seg_fanout = 0;
- for (rr_node_idx = 0; rr_node_idx < device_ctx.num_rr_nodes; rr_node_idx++) {
+ for (size_t rr_node_idx = 0; rr_node_idx < device_ctx.rr_nodes.size(); rr_node_idx++) {
auto node = &device_ctx.rr_nodes[rr_node_idx];
switch (node->type()) {
@@ -1346,13 +1344,12 @@
bool power_uninit() {
int mux_size;
int log_idx;
- int rr_node_idx;
int msg_idx;
auto& device_ctx = g_vpr_ctx.device();
auto& power_ctx = g_vpr_ctx.power();
bool error = false;
- for (rr_node_idx = 0; rr_node_idx < device_ctx.num_rr_nodes; rr_node_idx++) {
+ for (size_t rr_node_idx = 0; rr_node_idx < device_ctx.rr_nodes.size(); rr_node_idx++) {
auto node = &device_ctx.rr_nodes[rr_node_idx];
t_rr_node_power * node_power = &rr_node_power[rr_node_idx];
diff --git a/vpr/src/route/check_route.cpp b/vpr/src/route/check_route.cpp
index e8efd57..a534085 100755
--- a/vpr/src/route/check_route.cpp
+++ b/vpr/src/route/check_route.cpp
@@ -64,7 +64,7 @@
int max_pins, inode, prev_node;
unsigned int ipin;
bool valid, connects;
- bool * connected_to_route; /* [0 .. device_ctx.num_rr_nodes-1] */
+ bool * connected_to_route; /* [0 .. device_ctx.rr_nodes.size()-1] */
t_trace *tptr;
bool * pin_done;
@@ -90,7 +90,7 @@
auto non_configurable_rr_sets = identify_non_configurable_rr_sets();
- connected_to_route = (bool *) vtr::calloc(device_ctx.num_rr_nodes, sizeof(bool));
+ connected_to_route = (bool *) vtr::calloc(device_ctx.rr_nodes.size(), sizeof(bool));
max_pins = 0;
for (auto net_id : cluster_ctx.clb_nlist.nets())
@@ -563,8 +563,8 @@
/* First set the occupancy of everything to zero. */
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++)
- route_ctx.rr_node_route_inf[inode].set_occ(0);
+ for (size_t inode_idx = 0; inode_idx < device_ctx.rr_nodes.size(); inode_idx++)
+ route_ctx.rr_node_route_inf[inode_idx].set_occ(0);
/* Now go through each net and count the tracks and pins used everywhere */
@@ -655,9 +655,9 @@
auto& device_ctx = g_vpr_ctx.device();
- if (inode < 0 || inode >= device_ctx.num_rr_nodes) {
+ if (inode < 0 || inode >= (int) device_ctx.rr_nodes.size()) {
vpr_throw(VPR_ERROR_ROUTE, __FILE__, __LINE__,
- "in check_node_and_range: rr_node #%d is out of legal, range (0 to %d).\n", inode, device_ctx.num_rr_nodes - 1);
+ "in check_node_and_range: rr_node #%d is out of legal, range (0 to %d).\n", inode, device_ctx.rr_nodes.size() - 1);
}
check_rr_node(inode, route_type, device_ctx);
}
@@ -669,7 +669,7 @@
//Walk through the RR graph and recursively expand non-configurable edges
//to collect the sets of non-configurably connected nodes
auto& device_ctx = g_vpr_ctx.device();
- for (int inode = 0; inode < device_ctx.num_rr_nodes; ++inode) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); ++inode) {
std::set<t_node_edge> edge_set;
expand_non_configurable(inode, edge_set);
diff --git a/vpr/src/route/check_rr_graph.cpp b/vpr/src/route/check_rr_graph.cpp
index d67b650..fa34360 100755
--- a/vpr/src/route/check_rr_graph.cpp
+++ b/vpr/src/route/check_rr_graph.cpp
@@ -31,10 +31,10 @@
auto& device_ctx = g_vpr_ctx.device();
- auto total_edges_to_node = std::vector<int>(device_ctx.num_rr_nodes);
- auto switch_types_from_current_to_node = std::vector<unsigned char>(device_ctx.num_rr_nodes);
+ auto total_edges_to_node = std::vector<int>(device_ctx.rr_nodes.size());
+ auto switch_types_from_current_to_node = std::vector<unsigned char>(device_ctx.rr_nodes.size());
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
/* Ignore any uninitialized rr_graph nodes */
if ((device_ctx.rr_nodes[inode].type() == SOURCE)
@@ -56,7 +56,7 @@
check_rr_edge(inode, iedge, to_node);
- if (to_node < 0 || to_node >= device_ctx.num_rr_nodes) {
+ if (to_node < 0 || to_node >= (int) device_ctx.rr_nodes.size()) {
vpr_throw(VPR_ERROR_ROUTE, __FILE__, __LINE__,
"in check_rr_graph: node %d has an edge %d.\n"
"\tEdge is out of range.\n", inode, to_node);
@@ -128,7 +128,7 @@
* now I check that everything is reachable. */
bool is_fringe_warning_sent = false;
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
t_rr_type rr_type = device_ctx.rr_nodes[inode].type();
if (rr_type != SOURCE) {
diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp
index 7941237..c812c4d 100644
--- a/vpr/src/route/route_common.cpp
+++ b/vpr/src/route/route_common.cpp
@@ -374,7 +374,7 @@
auto& device_ctx = g_vpr_ctx.device();
auto& route_ctx = g_vpr_ctx.routing();
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
if (route_ctx.rr_node_route_inf[inode].occ() > device_ctx.rr_nodes[inode].capacity()) {
return (false);
}
@@ -389,7 +389,7 @@
auto& route_ctx = g_vpr_ctx.routing();
std::vector<int> congested_rr_nodes;
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
short occ = route_ctx.rr_node_route_inf[inode].occ();
short capacity = device_ctx.rr_nodes[inode].capacity();
@@ -400,13 +400,14 @@
return congested_rr_nodes;
}
-//Returns a vector from [0..device_ctx.num_rr_nodes-1] containing the set of nets using each RR node
+/* Returns a vector from [0..device_ctx.rr_nodes.size()-1] containing the set
+ * of nets using each RR node */
std::vector<std::set<ClusterNetId>> collect_rr_node_nets() {
auto& device_ctx = g_vpr_ctx.device();
auto& route_ctx = g_vpr_ctx.routing();
auto& cluster_ctx = g_vpr_ctx.clustering();
- std::vector<std::set<ClusterNetId>> rr_node_nets(device_ctx.num_rr_nodes);
+ std::vector<std::set<ClusterNetId>> rr_node_nets(device_ctx.rr_nodes.size());
for (ClusterNetId inet : cluster_ctx.clb_nlist.nets()) {
t_trace* trace_elem = route_ctx.trace_head[inet];
while (trace_elem) {
@@ -485,11 +486,11 @@
* changed. THIS ROUTINE ASSUMES THE OCCUPANCY VALUES IN RR_NODE ARE UP TO *
* DATE. */
- int inode, occ, capacity;
+ int occ, capacity;
auto& device_ctx = g_vpr_ctx.device();
auto& route_ctx = g_vpr_ctx.mutable_routing();
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
occ = route_ctx.rr_node_route_inf[inode].occ();
capacity = device_ctx.rr_nodes[inode].capacity();
@@ -1048,7 +1049,7 @@
auto& route_ctx = g_vpr_ctx.mutable_routing();
auto& device_ctx = g_vpr_ctx.device();
- route_ctx.rr_node_route_inf.resize(device_ctx.num_rr_nodes);
+ route_ctx.rr_node_route_inf.resize(device_ctx.rr_nodes.size());
reset_rr_node_route_structs();
}
@@ -1060,9 +1061,9 @@
auto& route_ctx = g_vpr_ctx.mutable_routing();
auto& device_ctx = g_vpr_ctx.device();
- VTR_ASSERT(route_ctx.rr_node_route_inf.size() == size_t(device_ctx.num_rr_nodes));
+ VTR_ASSERT(route_ctx.rr_node_route_inf.size() == size_t(device_ctx.rr_nodes.size()));
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
route_ctx.rr_node_route_inf[inode].prev_node = NO_PREVIOUS;
route_ctx.rr_node_route_inf[inode].prev_edge = NO_PREVIOUS;
route_ctx.rr_node_route_inf[inode].pres_cost = 1.0;
@@ -1913,7 +1914,7 @@
}
}
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
int occ = route_ctx.rr_node_route_inf[inode].occ();
int cap = device_ctx.rr_nodes[inode].capacity();
if (occ > cap) {
diff --git a/vpr/src/route/route_profiling.cpp b/vpr/src/route/route_profiling.cpp
index 67b3d1d..79ea414 100644
--- a/vpr/src/route/route_profiling.cpp
+++ b/vpr/src/route/route_profiling.cpp
@@ -147,7 +147,7 @@
// print out specific node information if congestion for type is low enough
int total_congestion = 0;
- for (int inode = 0; inode < device_ctx.num_rr_nodes; ++inode) {
+ for (int inode = 0; inode < device_ctx.rr_nodes.size(); ++inode) {
const t_rr_node& node = device_ctx.rr_nodes[inode];
int congestion = node.get_occ() - node.get_capacity();
@@ -170,7 +170,7 @@
// specific print out each congested node
if (!congested.empty()) {
vtr::printf_info("Specific congested nodes\nxlow ylow type\n");
- for (int inode = 0; inode < device_ctx.num_rr_nodes; ++inode) {
+ for (int inode = 0; inode < device_ctx.rr_nodes.size(); ++inode) {
const t_rr_node& node = device_ctx.rr_nodes[inode];
if (congested.is_congested(node.type) && (node.get_occ() - node.get_capacity()) > 0) {
vtr::printf_info("(%3d,%3d) %6s\n", node.get_xlow(), node.get_ylow(), node_typename[node.type]);
diff --git a/vpr/src/route/route_timing.cpp b/vpr/src/route/route_timing.cpp
index c0b4c19..0a476fd 100644
--- a/vpr/src/route/route_timing.cpp
+++ b/vpr/src/route/route_timing.cpp
@@ -2020,8 +2020,7 @@
size_t overused_nodes = 0;
size_t total_overuse = 0;
size_t worst_overuse = 0;
- int inode;
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
int overuse = route_ctx.rr_node_route_inf[inode].occ() - device_ctx.rr_nodes[inode].capacity();
if (overuse > 0) {
overused_nodes += 1;
@@ -2030,7 +2029,7 @@
worst_overuse = std::max(worst_overuse, size_t(overuse));
}
}
- return OveruseInfo(device_ctx.num_rr_nodes, overused_nodes, total_overuse, worst_overuse);
+ return OveruseInfo(device_ctx.rr_nodes.size(), overused_nodes, total_overuse, worst_overuse);
}
static WirelengthInfo calculate_wirelength_info() {
@@ -2040,7 +2039,7 @@
size_t used_wirelength = 0;
size_t available_wirelength = 0;
- for (int i = 0; i < device_ctx.num_rr_nodes; ++i) {
+ for (size_t i = 0; i < device_ctx.rr_nodes.size(); ++i) {
if (device_ctx.rr_nodes[i].type() == CHANX || device_ctx.rr_nodes[i].type() == CHANY) {
available_wirelength += device_ctx.rr_nodes[i].capacity() +
device_ctx.rr_nodes[i].xhigh() - device_ctx.rr_nodes[i].xlow() +
diff --git a/vpr/src/route/route_tree_timing.cpp b/vpr/src/route/route_tree_timing.cpp
index 935eac8..046fd0e 100755
--- a/vpr/src/route/route_tree_timing.cpp
+++ b/vpr/src/route/route_tree_timing.cpp
@@ -31,7 +31,7 @@
/* Array below allows mapping from any rr_node to any rt_node currently in
* the rt_tree. */
-static std::vector<t_rt_node *> rr_node_to_rt_node; /* [0..device_ctx.num_rr_nodes-1] */
+static std::vector<t_rt_node *> rr_node_to_rt_node; /* [0..device_ctx.rr_nodes.size()-1] */
/* Frees lists for fast addition and deletion of nodes and edges. */
@@ -80,7 +80,8 @@
auto& device_ctx = g_vpr_ctx.device();
- bool route_tree_structs_are_allocated = (rr_node_to_rt_node.size() == size_t(device_ctx.num_rr_nodes)
+ bool route_tree_structs_are_allocated =
+ (rr_node_to_rt_node.size() == size_t(device_ctx.rr_nodes.size())
|| rt_node_free_list != nullptr);
if (route_tree_structs_are_allocated) {
if (exists_ok) {
@@ -91,7 +92,7 @@
}
}
- rr_node_to_rt_node = std::vector<t_rt_node*>(device_ctx.num_rr_nodes, nullptr);
+ rr_node_to_rt_node = std::vector<t_rt_node*>(device_ctx.rr_nodes.size(), nullptr);
return true;
}
diff --git a/vpr/src/route/router_lookahead_map.cpp b/vpr/src/route/router_lookahead_map.cpp
index 09063b5..14cceaf 100644
--- a/vpr/src/route/router_lookahead_map.cpp
+++ b/vpr/src/route/router_lookahead_map.cpp
@@ -392,10 +392,10 @@
auto& device_ctx = g_vpr_ctx.device();
/* a list of boolean flags (one for each rr node) to figure out if a certain node has already been expanded */
- vector<bool> node_expanded( device_ctx.num_rr_nodes, false );
+ vector<bool> node_expanded( device_ctx.rr_nodes.size(), false );
/* for each node keep a list of the cost with which that node has been visited (used to determine whether to push
a candidate node onto the expansion queue */
- vector<float> node_visited_costs( device_ctx.num_rr_nodes, -1.0 );
+ vector<float> node_visited_costs( device_ctx.rr_nodes.size(), -1.0 );
/* a priority queue for expansion */
priority_queue<PQ_Entry> pq;
diff --git a/vpr/src/route/rr_graph.cpp b/vpr/src/route/rr_graph.cpp
index ed773e5..06645c7 100644
--- a/vpr/src/route/rr_graph.cpp
+++ b/vpr/src/route/rr_graph.cpp
@@ -469,11 +469,11 @@
/* END FC */
/* Alloc node lookups, count nodes, alloc rr nodes */
- device_ctx.num_rr_nodes = 0;
+ int num_rr_nodes = 0;
device_ctx.rr_node_indices = alloc_and_load_rr_node_indices(max_chan_width, grid,
- &device_ctx.num_rr_nodes, chan_details_x, chan_details_y);
- device_ctx.rr_nodes.resize(device_ctx.num_rr_nodes);
+ &num_rr_nodes, chan_details_x, chan_details_y);
+ device_ctx.rr_nodes.resize(num_rr_nodes);
/* These are data structures used by the the unidir opin mapping. They are used
to spread connections evenly for each segment type among the available
@@ -571,7 +571,7 @@
/* END OPIN MAP */
bool Fc_clipped = false;
- alloc_and_load_rr_graph(device_ctx.num_rr_nodes, device_ctx.rr_nodes, num_seg_types,
+ alloc_and_load_rr_graph(device_ctx.rr_nodes.size(), device_ctx.rr_nodes, num_seg_types,
seg_details, chan_details_x, chan_details_y,
track_to_pin_lookup, opin_to_track_map,
switch_block_conn, sb_conn_map, grid, Fs, unidir_sb_pattern,
@@ -584,7 +584,7 @@
/* Update rr_nodes capacities if global routing */
if (graph_type == GRAPH_GLOBAL) {
- for (int i = 0; i < device_ctx.num_rr_nodes; i++) {
+ for (size_t i = 0; i < device_ctx.rr_nodes.size(); i++) {
if (device_ctx.rr_nodes[i].type() == CHANX) {
int ylow = device_ctx.rr_nodes[i].ylow();
device_ctx.rr_nodes[i].set_capacity(device_ctx.chan_width.x_list[ylow]);
@@ -720,8 +720,8 @@
int num_rr_switches = 0;
// map key: switch index specified in arch; map value: fanin for that index
- map<int, int> *inward_switch_inf = new map<int, int>[device_ctx.num_rr_nodes];
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ map<int, int> *inward_switch_inf = new map<int, int>[device_ctx.rr_nodes.size()];
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
const t_rr_node& from_node = device_ctx.rr_nodes[inode];
int num_edges = from_node.num_edges();
for (int iedge = 0; iedge < num_edges; iedge++) {
@@ -734,7 +734,7 @@
}
// get unique index / fanin combination based on inward_switch_inf
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
map<int, int>::iterator itr;
for (itr = inward_switch_inf[inode].begin(); itr != inward_switch_inf[inode].end(); itr++) {
int switch_index = itr->first;
@@ -813,7 +813,7 @@
static void remap_rr_node_switch_indices(map<int, int> *switch_fanin) {
auto& device_ctx = g_vpr_ctx.mutable_device();
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
auto& from_node = device_ctx.rr_nodes[inode];
int num_edges = from_node.num_edges();
for (int iedge = 0; iedge < num_edges; iedge++) {
@@ -1234,7 +1234,6 @@
device_ctx.rr_node_indices.clear();
device_ctx.rr_nodes.clear();
- device_ctx.num_rr_nodes = 0;
device_ctx.rr_node_indices.clear();
@@ -2192,7 +2191,7 @@
FILE *fp = vtr::fopen(file_name, "w");
- for (int inode = 0; inode < device_ctx.num_rr_nodes; ++inode) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); ++inode) {
print_rr_node(fp, device_ctx.rr_nodes, inode);
fprintf(fp, "\n");
}
diff --git a/vpr/src/route/rr_graph2.cpp b/vpr/src/route/rr_graph2.cpp
index 49cde38..59b9e98 100755
--- a/vpr/src/route/rr_graph2.cpp
+++ b/vpr/src/route/rr_graph2.cpp
@@ -2687,7 +2687,7 @@
}
void partition_rr_graph_edges(DeviceContext& device_ctx) {
- for (int inode = 0; inode < device_ctx.num_rr_nodes; ++inode) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); ++inode) {
device_ctx.rr_nodes[inode].partition_edges();
}
}
diff --git a/vpr/src/route/rr_graph_area.cpp b/vpr/src/route/rr_graph_area.cpp
index fe5ca3d..61d8095 100755
--- a/vpr/src/route/rr_graph_area.cpp
+++ b/vpr/src/route/rr_graph_area.cpp
@@ -101,7 +101,7 @@
* optimistic (but I still think it's pretty reasonable). */
auto& device_ctx = g_vpr_ctx.device();
- int *num_inputs_to_cblock; /* [0..device_ctx.num_rr_nodes-1], but all entries not */
+ int *num_inputs_to_cblock; /* [0..device_ctx.rr_nodes.size()-1], but all entries not */
/* corresponding to IPINs will be 0. */
@@ -110,7 +110,7 @@
float *unsharable_switch_trans, *sharable_switch_trans; /* [0..num_switch-1] */
t_rr_type from_rr_type, to_rr_type;
- int from_node, to_node, iedge, num_edges, maxlen;
+ int iedge, num_edges, maxlen;
int iswitch, i, j, iseg, max_inputs_to_cblock;
float input_cblock_trans, shared_opin_buffer_trans;
@@ -144,7 +144,7 @@
trans_track_to_cblock_buf = 0;
}
- num_inputs_to_cblock = (int *) vtr::calloc(device_ctx.num_rr_nodes, sizeof(int));
+ num_inputs_to_cblock = (int *) vtr::calloc(device_ctx.rr_nodes.size(), sizeof(int));
maxlen = max(device_ctx.grid.width(), device_ctx.grid.height());
cblock_counted = (bool *) vtr::calloc(maxlen, sizeof(bool));
@@ -156,7 +156,7 @@
sharable_switch_trans = alloc_and_load_sharable_switch_trans(num_switch,
R_minW_nmos, R_minW_pmos);
- for (from_node = 0; from_node < device_ctx.num_rr_nodes; from_node++) {
+ for (size_t from_node = 0; from_node < device_ctx.rr_nodes.size(); from_node++) {
from_rr_type = device_ctx.rr_nodes[from_node].type();
@@ -168,7 +168,7 @@
for (iedge = 0; iedge < num_edges; iedge++) {
- to_node = device_ctx.rr_nodes[from_node].edge_sink_node(iedge);
+ size_t to_node = device_ctx.rr_nodes[from_node].edge_sink_node(iedge);
to_rr_type = device_ctx.rr_nodes[to_node].type();
/* Ignore any uninitialized rr_graph nodes */
@@ -308,12 +308,12 @@
auto& device_ctx = g_vpr_ctx.device();
bool * cblock_counted; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] -- 0th element unused. */
- int *num_inputs_to_cblock; /* [0..device_ctx.num_rr_nodes-1], but all entries not */
+ int *num_inputs_to_cblock; /* [0..device_ctx.rr_nodes.size()-1], but all entries not */
/* corresponding to IPINs will be 0. */
t_rr_type from_rr_type, to_rr_type;
- int i, j, iseg, from_node, to_node, iedge, num_edges, maxlen;
+ int i, j, iseg, to_node, iedge, num_edges, maxlen;
int max_inputs_to_cblock;
float input_cblock_trans;
@@ -323,7 +323,7 @@
switches of all rr nodes. Thus we keep track of which muxes we have already
counted via the variable below. */
bool *chan_node_switch_done;
- chan_node_switch_done = (bool *) vtr::calloc(device_ctx.num_rr_nodes, sizeof(bool));
+ chan_node_switch_done = (bool *) vtr::calloc(device_ctx.rr_nodes.size(), sizeof(bool));
/* The variable below is an accumulator variable that will add up all the *
* transistors in the routing. Make double so that it doesn't stop *
@@ -354,12 +354,12 @@
trans_track_to_cblock_buf = 0;
}
- num_inputs_to_cblock = (int *) vtr::calloc(device_ctx.num_rr_nodes, sizeof(int));
+ num_inputs_to_cblock = (int *) vtr::calloc(device_ctx.rr_nodes.size(), sizeof(int));
maxlen = max(device_ctx.grid.width(), device_ctx.grid.height());
cblock_counted = (bool *) vtr::calloc(maxlen, sizeof(bool));
ntrans = 0;
- for (from_node = 0; from_node < device_ctx.num_rr_nodes; from_node++) {
+ for (size_t from_node = 0; from_node < device_ctx.rr_nodes.size(); from_node++) {
from_rr_type = device_ctx.rr_nodes[from_node].type();
@@ -495,7 +495,7 @@
float *trans_per_cblock; /* [0..max_inputs_to_cblock] */
float trans_count;
- int i, num_inputs;
+ int num_inputs;
auto& device_ctx = g_vpr_ctx.device();
@@ -508,7 +508,7 @@
* buffer even when the number of inputs = 1 (i.e. no mux) because I assume *
* I need the drivability just for metal capacitance. */
- for (i = 1; i <= max_inputs_to_cblock; i++){
+ for (int i = 1; i <= max_inputs_to_cblock; i++){
trans_per_cblock[i] = trans_per_mux(i, trans_sram_bit,
device_ctx.rr_switch_inf[wire_to_ipin_switch].mux_trans_size);
trans_per_cblock[i] += device_ctx.rr_switch_inf[wire_to_ipin_switch].buf_size;
@@ -516,7 +516,7 @@
trans_count = 0.;
- for (i = 0; i < device_ctx.num_rr_nodes; i++) {
+ for (size_t i = 0; i < device_ctx.rr_nodes.size(); i++) {
num_inputs = num_inputs_to_cblock[i];
trans_count += trans_per_cblock[num_inputs];
}
diff --git a/vpr/src/route/rr_graph_reader.cpp b/vpr/src/route/rr_graph_reader.cpp
index 2025d56..d3693b1 100644
--- a/vpr/src/route/rr_graph_reader.cpp
+++ b/vpr/src/route/rr_graph_reader.cpp
@@ -147,9 +147,9 @@
/* Alloc rr nodes and count count nodes */
next_component = get_single_child(rr_graph, "rr_nodes", loc_data);
- device_ctx.num_rr_nodes = count_children(next_component, "node", loc_data);
+ int num_rr_nodes = count_children(next_component, "node", loc_data);
- device_ctx.rr_nodes.resize(device_ctx.num_rr_nodes);
+ device_ctx.rr_nodes.resize(num_rr_nodes);
process_nodes(next_component, loc_data);
/* Loads edges, switches, and node look up tables*/
@@ -170,7 +170,7 @@
process_rr_node_indices(grid);
- init_fan_in(device_ctx.rr_nodes, device_ctx.num_rr_nodes);
+ init_fan_in(device_ctx.rr_nodes, device_ctx.rr_nodes.size());
//sets the cost index and seg id information
next_component = get_single_child(rr_graph, "rr_nodes", loc_data);
@@ -384,7 +384,7 @@
int source_node;
//count the number of edges and store it in a vector
vector<int> num_edges_for_node;
- num_edges_for_node.resize(device_ctx.num_rr_nodes, 0);
+ num_edges_for_node.resize(device_ctx.rr_nodes.size(), 0);
while (edges) {
source_node = get_attribute(edges, "src_node", loc_data).as_int(0);
@@ -394,7 +394,7 @@
}
//reset this vector in order to start count for num edges again
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
num_edges_for_node[inode] = 0;
}
@@ -655,7 +655,7 @@
* Note that CHANX and CHANY 's x and y are swapped due to the chan and seg convention.
* Push back temporary incorrect nodes for CHANX and CHANY to set the length of the vector*/
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
auto& node = device_ctx.rr_nodes[inode];
if (node.type() == SOURCE || node.type() == SINK) {
for (int ix = node.xlow(); ix <= node.xhigh(); ix++) {
@@ -701,7 +701,7 @@
int count;
/* CHANX and CHANY need to reevaluated with its ptc num as the correct index*/
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
auto& node = device_ctx.rr_nodes[inode];
if (node.type() == CHANX) {
for (int iy = node.ylow(); iy <= node.yhigh(); iy++) {
@@ -746,7 +746,7 @@
auto& device_ctx = g_vpr_ctx.mutable_device();
//set the cost index in order to load the segment information, rr nodes should be set already
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
if (device_ctx.rr_nodes[inode].type() == SOURCE) {
device_ctx.rr_nodes[inode].set_cost_index(SOURCE_COST_INDEX);
} else if (device_ctx.rr_nodes[inode].type() == SINK) {
@@ -765,7 +765,7 @@
/*Go through each rr_node and use the segment ids to set CHANX and CHANY cost index*/
rr_node = get_first_child(parent, "node", loc_data);
- for (int i = 0; i < device_ctx.num_rr_nodes; i++) {
+ for (size_t i = 0; i < device_ctx.rr_nodes.size(); i++) {
auto& node = device_ctx.rr_nodes[i];
/*CHANX and CHANY cost index is dependent on the segment id*/
diff --git a/vpr/src/route/rr_graph_timing_params.cpp b/vpr/src/route/rr_graph_timing_params.cpp
index 47f2fe0..5e371d6 100755
--- a/vpr/src/route/rr_graph_timing_params.cpp
+++ b/vpr/src/route/rr_graph_timing_params.cpp
@@ -29,7 +29,8 @@
* separating tracks from the input connection block, if enabled by *
* INCLUDE_TRACK_BUFFERS) */
- int inode, iedge, switch_index, to_node, maxlen;
+ int iedge, switch_index, maxlen;
+ size_t to_node;
int icblock, isblock, iseg_low, iseg_high;
float Cin, Cout;
t_rr_type from_rr_type, to_rr_type;
@@ -45,9 +46,9 @@
cblock_counted = (bool *) vtr::calloc(maxlen, sizeof(bool));
buffer_Cin = (float *) vtr::calloc(maxlen, sizeof(float));
- std::vector<float> rr_node_C(device_ctx.num_rr_nodes, 0.); //Stores the final C
+ std::vector<float> rr_node_C(device_ctx.rr_nodes.size(), 0.); //Stores the final C
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
//The C may have already been partly initialized (e.g. with metal capacitance)
rr_node_C[inode] += device_ctx.rr_nodes[inode].C();
@@ -177,8 +178,8 @@
* Current structures only keep switch information from a node to the next node and
* not the reverse. Therefore I need to go through all the possible edges to figure
* out what the Cout's should be */
- Couts_to_add = (float *) vtr::calloc(device_ctx.num_rr_nodes, sizeof(float));
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ Couts_to_add = (float *) vtr::calloc(device_ctx.rr_nodes.size(), sizeof(float));
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
for (iedge = 0; iedge < device_ctx.rr_nodes[inode].num_edges(); iedge++) {
switch_index = device_ctx.rr_nodes[inode].edge_switch(iedge);
to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
@@ -192,12 +193,12 @@
}
}
}
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
rr_node_C[inode] += Couts_to_add[inode];
}
//Create the final flywieghted t_rr_rc_data
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
mutable_device_ctx.rr_nodes[inode].set_rc_index(find_create_rr_rc_data(device_ctx.rr_nodes[inode].R(), rr_node_C[inode]));
}
diff --git a/vpr/src/route/rr_graph_writer.cpp b/vpr/src/route/rr_graph_writer.cpp
index 91b0fb5..4aba10d 100644
--- a/vpr/src/route/rr_graph_writer.cpp
+++ b/vpr/src/route/rr_graph_writer.cpp
@@ -95,7 +95,7 @@
fp << "\t<rr_nodes>" << endl;
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
auto& node = device_ctx.rr_nodes[inode];
fp << "\t\t<node";
fp << " id=\"" << inode;
@@ -264,7 +264,7 @@
auto& device_ctx = g_vpr_ctx.device();
fp << "\t<rr_edges>" << endl;
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
auto& node = device_ctx.rr_nodes[inode];
for (int iedge = 0; iedge < node.num_edges(); iedge++) {
fp << "\t\t<edge src_node=\"" << inode <<
diff --git a/vpr/src/route/segment_stats.cpp b/vpr/src/route/segment_stats.cpp
index a2a34a9..2a68409 100755
--- a/vpr/src/route/segment_stats.cpp
+++ b/vpr/src/route/segment_stats.cpp
@@ -22,7 +22,7 @@
* are counted as full-length segments (e.g. length 4 even if the last 2 *
* units of wire were chopped off by the chip edge). */
- int inode, length, seg_type, max_segment_length, cost_index;
+ int length, seg_type, max_segment_length, cost_index;
int *seg_occ_by_length, *seg_cap_by_length; /* [0..max_segment_length] */
int *seg_occ_by_type, *seg_cap_by_type; /* [0..num_segment-1] */
float utilization;
@@ -45,7 +45,7 @@
seg_occ_by_type = (int *) vtr::calloc(num_segment, sizeof(int));
seg_cap_by_type = (int *) vtr::calloc(num_segment, sizeof(int));
- for (inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
if (device_ctx.rr_nodes[inode].type() == CHANX || device_ctx.rr_nodes[inode].type() == CHANY) {
cost_index = device_ctx.rr_nodes[inode].cost_index();
seg_type = device_ctx.rr_indexed_data[cost_index].seg_index;
diff --git a/vpr/src/timing/net_delay.cpp b/vpr/src/timing/net_delay.cpp
index 537f28e..d142e09 100755
--- a/vpr/src/timing/net_delay.cpp
+++ b/vpr/src/timing/net_delay.cpp
@@ -141,9 +141,9 @@
t_rc_node *rc_node_free_list, *rc_root;
t_linked_rc_edge *rc_edge_free_list;
- t_linked_rc_ptr *rr_node_to_rc_node; /* [0..device_ctx.num_rr_nodes-1] */
+ t_linked_rc_ptr *rr_node_to_rc_node; /* [0..device_ctx.rr_nodes.size()-1] */
- rr_node_to_rc_node = (t_linked_rc_ptr *) vtr::calloc(device_ctx.num_rr_nodes,
+ rr_node_to_rc_node = (t_linked_rc_ptr *) vtr::calloc(device_ctx.rr_nodes.size(),
sizeof(t_linked_rc_ptr));
rc_node_free_list = nullptr;
diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp
index b8b309c..ef0e45a 100644
--- a/vpr/src/util/vpr_utils.cpp
+++ b/vpr/src/util/vpr_utils.cpp
@@ -1919,8 +1919,8 @@
switch_fanin_delay = new map<int, float>[device_ctx.num_arch_switches];
// a node can have multiple inward switches, so
// map key: switch index; map value: count (fanin)
- map<int, int> *inward_switch_inf = new map<int, int>[device_ctx.num_rr_nodes];
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ map<int, int> *inward_switch_inf = new map<int, int>[device_ctx.rr_nodes.size()];
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
const t_rr_node& from_node = device_ctx.rr_nodes[inode];
int num_edges = from_node.num_edges();
for (int iedge = 0; iedge < num_edges; iedge++) {
@@ -1935,7 +1935,7 @@
inward_switch_inf[to_node_index][switch_index] ++;
}
}
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
map<int, int>::iterator itr;
for (itr = inward_switch_inf[inode].begin(); itr != inward_switch_inf[inode].end(); itr++) {
int switch_index = itr->first;
@@ -1984,7 +1984,7 @@
map<int, int> used_wire_count;
map<int, int> total_wire_count;
auto& device_ctx = g_vpr_ctx.device();
- for (int inode = 0; inode < device_ctx.num_rr_nodes; inode++) {
+ for (int inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
if (device_ctx.rr_nodes[inode].type() == CHANX || rr_node[inode].type() == CHANY) {
//int length = abs(device_ctx.rr_nodes[inode].get_xhigh() + rr_node[inode].get_yhigh()
// - device_ctx.rr_nodes[inode].get_xlow() - rr_node[inode].get_ylow());
