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foss-fpga-tools/third_party/vtr-verilog-to-routing/refs/heads/interposer/./doc/journal/fpgapaperfinal/FPGAPaper
tree: 01218a2387c645487610c272159a3aa0121f6e66 [path history] [tgz]
  1. graph_src/
  2. a-eps-converted-to.pdf
  3. a.eps
  4. a_b-eps-converted-to.pdf
  5. a_b.eps
  6. a_b_2-eps-converted-to.pdf
  7. a_b_2.eps
  8. a_b_prime-eps-converted-to.pdf
  9. a_b_prime.eps
  10. a_b_prime_2-eps-converted-to.pdf
  11. a_b_prime_2.eps
  12. a_prime-eps-converted-to.pdf
  13. a_prime.eps
  14. acm_proc_article-sp.cls
  15. additional_fanins-eps-converted-to.pdf
  16. additional_fanins.eps
  17. additional_fanins_2-eps-converted-to.pdf
  18. additional_fanins_2.eps
  19. apereira.JPG
  20. arch_experiments-eps-converted-to.pdf
  21. arch_experiments.eps
  22. arch_experiments2-eps-converted-to.pdf
  23. arch_experiments2.eps
  24. arch_experiments3-eps-converted-to.pdf
  25. arch_experiments3.eps
  26. arch_experiments4-eps-converted-to.pdf
  27. arch_experiments4.eps
  28. architecture_params-eps-converted-to.pdf
  29. architecture_params.eps
  30. areadelay_constant_sweep-eps-converted-to.pdf
  31. areadelay_constant_sweep.eps
  32. areadelay_constant_sweep_log-eps-converted-to.pdf
  33. areadelay_constant_sweep_log.eps
  34. b-eps-converted-to.pdf
  35. b.eps
  36. b_prime-eps-converted-to.pdf
  37. b_prime.eps
  38. bb-eps-converted-to.pdf
  39. bb.eps
  40. bb.odg
  41. bb.png
  42. bb1.eps
  43. bb2.eps
  44. bb_new-eps-converted-to.pdf
  45. bb_new.eps
  46. bb_new.png
  47. circuit_sizes.ods
  48. clique-eps-converted-to.pdf
  49. clique.eps
  50. comparison_bars_relative-eps-converted-to.pdf
  51. comparison_bars_relative.eps
  52. comparison_minW-eps-converted-to.pdf
  53. comparison_minW.eps
  54. constant_sweep.ods
  55. cover_letter.docx
  56. cover_letter.txt
  57. crit_path_4part-eps-converted-to.pdf
  58. crit_path_4part.eps
  59. crit_path_4part.tex
  60. critical_path_delay.txt
  61. cuts_crit_path-eps-converted-to.pdf
  62. cuts_crit_path.eps
  63. cuts_minW-eps-converted-to.pdf
  64. cuts_minW.eps
  65. delays_crit_path-eps-converted-to.pdf
  66. delays_crit_path.eps
  67. delays_crit_path_new-eps-converted-to.pdf
  68. delays_crit_path_new.eps
  69. difference_from_prior.tex
  70. enasiri.jpg
  71. final_results.ods
  72. fpga-eps-converted-to.pdf
  73. fpga.eps
  74. fpga.odg
  75. fpga2014paper.aux
  76. fpga2014paper.bbl
  77. fpga2014paper.bib
  78. fpga2014paper.bib.bak
  79. fpga2014paper.blg
  80. fpga2014paper.dvi
  81. fpga2014paper.log
  82. fpga2014paper.pdf
  83. fpga2014paper.ps
  84. fpga2014paper.tex
  85. fpga2014paper.tex.bak
  86. graph_topology_cutsize-eps-converted-to.pdf
  87. graph_topology_cutsize.eps
  88. graph_topology_cutsize.tex
  89. graph_topology_mcw-eps-converted-to.pdf
  90. graph_topology_mcw.eps
  91. graph_topology_mcw.tex
  92. gui_1-eps-converted-to.pdf
  93. gui_1.eps
  94. gui_2-eps-converted-to.pdf
  95. gui_2.eps
  96. hg2g_clique.pdf
  97. hg2g_star.pdf
  98. hyperedge_cutline.pdf
  99. IEEEtran.cls
  100. implementation-eps-converted-to.pdf
  101. implementation.eps
  102. implementation.odg
  103. implementation.png
  104. interposer-eps-converted-to.pdf
  105. interposer.eps
  106. interposer.png
  107. interposer_old.eps
  108. javeed.jpg
  109. minChW-eps-converted-to.pdf
  110. MinChW.eps
  111. minChW_2-eps-converted-to.pdf
  112. MinChW_2.eps
  113. MinChW_3-eps-converted-to.pdf
  114. MinChW_3.eps
  115. MinChW_3.png
  116. minimum_channel_width.txt
  117. minW_constant_sweep-eps-converted-to.pdf
  118. minW_constant_sweep.eps
  119. minW_constant_sweep_log-eps-converted-to.pdf
  120. minW_constant_sweep_log.eps
  121. missfont.log
  122. numberofcrossingwires-eps-converted-to.pdf
  123. numberofcrossingwires.eps
  124. numberofcrossingwires_new-eps-converted-to.pdf
  125. numberofcrossingwires_new.eps
  126. numberofcrossingwires_new_2-eps-converted-to.pdf
  127. numberofcrossingwires_new_2.eps
  128. packing_bloat-eps-converted-to.pdf
  129. packing_bloat.eps
  130. packing_bloat.tex
  131. partitioning.log
  132. partitioning.tex
  133. partitioning_cad_flow-eps-converted-to.pdf
  134. partitioning_cad_flow.eps
  135. placer_opt_fmax-eps-converted-to.pdf
  136. placer_opt_fmax.eps
  137. placer_opt_minChW-eps-converted-to.pdf
  138. placer_opt_minChW.eps
  139. placer_opt_minChW_2-eps-converted-to.pdf
  140. placer_opt_minChW_2.eps
  141. response_to_reviewers.txt
  142. review_comments.txt
  143. router_opt-eps-converted-to.pdf
  144. router_opt.eps
  145. router_opt.png
  146. router_opt_fmax-eps-converted-to.pdf
  147. router_opt_fmax.eps
  148. router_opt_fmax.png
  149. rrgraph_before.aux
  150. rrgraph_before.log
  151. rrgraph_before.pdf
  152. rrgraph_before.tex
  153. sig-alternate-2013.cls
  154. sig-alternate.cls
  155. square_fpga.pdf
  156. standard_crit_path-eps-converted-to.pdf
  157. standard_crit_path.eps
  158. standard_crit_path_new-eps-converted-to.pdf
  159. standard_crit_path_new.eps
  160. standard_minW-eps-converted-to.pdf
  161. standard_minW.eps
  162. star-eps-converted-to.pdf
  163. star.eps
  164. tall_fpga.pdf
  165. vbetz.jpg
  166. vpr_flows_crit_path-eps-converted-to.pdf
  167. vpr_flows_crit_path.eps
  168. vpr_flows_crit_path.tex
  169. vpr_flows_mcw-eps-converted-to.pdf
  170. vpr_flows_mcw.eps
  171. vpr_flows_mcw.tex
  172. vpr_gui-eps-converted-to.pdf
  173. vpr_gui.eps
  174. vpr_gui_full-eps-converted-to.pdf
  175. vpr_gui_full.eps
  176. vpr_gui_zoom-eps-converted-to.pdf
  177. vpr_gui_zoom.eps
  178. wires_cut-eps-converted-to.pdf
  179. wires_cut.eps
  180. wires_cut.tex
  181. wires_cut_4part-eps-converted-to.pdf
  182. wires_cut_4part.eps
  183. wires_cut_4part.tex