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foss-fpga-tools
/
third_party
/
vtr-verilog-to-routing
/
refs/heads/passes_vpr
/
.
/
vtr_flow
/
arch
/
timing
tree: 67883e14c3987a75e24e6c17027b33db1ecc2758 [
path history
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[
tgz
]
fixed_size/
fraclut_carrychain/
EArch.xml
hard_fpu_arch_timing.xml
k4_N4_90nm.xml
k4_N4_90nm_default_fc_pinloc.xml
k4_N8_legacy_45nm.xml
k6_frac_N10_40nm.xml
k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml
k6_frac_N10_frac_chain_mem32K_40nm.xml
k6_frac_N10_mem32K_40nm.xml
k6_N10_40nm.xml
k6_N10_gate_boost_0.2V_22nm.xml
k6_N10_legacy_45nm.xml
k6_N10_mem32K_40nm.xml
k6_N10_mem32K_40nm_fc_abs.xml
k6_N10_ripple_chain_gate_boost_0.2V_22nm.xml
k6_N10_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml
k6_N8_gate_boost_0.2V_22nm.xml
k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml
k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml
k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml
k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml
soft_fpu_arch_timing.xml
soft_fpu_arch_timing_chain.xml
xc6vlx240tff1156.xml