)]}'
{
  "id": "1bc2778760e46c70333382930b772061c3f52fa0",
  "repo": "third_party/yosys",
  "revision": "1d098b719513ef2fa701b88b9b56c6e989384c05",
  "path": "manual/APPNOTE_012_Verilog_to_BTOR.tex"
}
