)]}'
{
  "commit": "1eb101a38a0e6ca99cb1dfbcc77f16a6bff79465",
  "tree": "3043c7806794c2dc9b942863bf6fa3f41e699922",
  "parents": [
    "50b09de03320843660636c663629c649ab242321"
  ],
  "author": {
    "name": "Clifford Wolf",
    "email": "clifford@clifford.at",
    "time": "Wed Jan 02 15:33:43 2019 +0100"
  },
  "committer": {
    "name": "Clifford Wolf",
    "email": "clifford@clifford.at",
    "time": "Wed Jan 02 15:33:43 2019 +0100"
  },
  "message": "Improve VerificImporter support for writes to asymmetric memories\n\nSigned-off-by: Clifford Wolf \u003cclifford@clifford.at\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5280a2b9c12c81582b1baaf4a04d876a776bd725",
      "old_mode": 33188,
      "old_path": "frontends/verific/verific.cc",
      "new_id": "94138cdd67f77dafdc0fd0547d554198b525d8b7",
      "new_mode": 33188,
      "new_path": "frontends/verific/verific.cc"
    }
  ]
}
