)]}'
{
  "commit": "81876a3734dacde199446343ce338b24e9b2796f",
  "tree": "f637930db9d29efaeb4609017f07761f012b6d99",
  "parents": [
    "84982b308343315c889d3d00116db820a51cad78",
    "4f426c2ac48bbb5ae9e92ca046aa20af35d75a52"
  ],
  "author": {
    "name": "Clifford Wolf",
    "email": "clifford@clifford.at",
    "time": "Sun Oct 27 10:25:01 2019 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Sun Oct 27 10:25:01 2019 +0100"
  },
  "message": "Merge pull request #1393 from whitequark/write_verilog-avoid-init\n\nwrite_verilog: do not print (*init*) attributes on regs",
  "tree_diff": []
}