)]}'
{
  "commit": "838077c221bb6a36e4a7e54df22feaa133db48e9",
  "tree": "461884e9d4743f66e8011f157fd8a14d821b5f58",
  "parents": [
    "72d2ef6fd071a8b2b9e1a77ddab3a9d632aa0f3d"
  ],
  "author": {
    "name": "David Shah",
    "email": "dave@ds0.me",
    "time": "Fri Nov 22 08:24:01 2019 +0000"
  },
  "committer": {
    "name": "David Shah",
    "email": "dave@ds0.me",
    "time": "Fri Nov 22 15:08:15 2019 +0000"
  },
  "message": "sv: Add lexing and parsing of .* (wildcard port conns)\n\nSigned-off-by: David Shah \u003cdave@ds0.me\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c8984c2c41a404f60d9b6555c842addad7ed0bfa",
      "old_mode": 33188,
      "old_path": "frontends/verilog/verilog_lexer.l",
      "new_id": "f4a0484d7a66c8e36d9c324e986100f43a5f2205",
      "new_mode": 33188,
      "new_path": "frontends/verilog/verilog_lexer.l"
    },
    {
      "type": "modify",
      "old_id": "daea3b43ab99f27cc4c014a7437edb881be438d6",
      "old_mode": 33188,
      "old_path": "frontends/verilog/verilog_parser.y",
      "new_id": "fc8df1940b8fe0f643239029233ff76d5e1af1e3",
      "new_mode": 33188,
      "new_path": "frontends/verilog/verilog_parser.y"
    }
  ]
}
