)]}'
{
  "commit": "219c0edf5ff3092bfe54c26afb5bb6a36c12b752",
  "tree": "09da861003aba94c92b77d95461ef85680f1fc72",
  "parents": [
    "84591bf7ff2d525f55208b6363c3efb2ecef7fd3"
  ],
  "author": {
    "name": "Jeppe Johansen",
    "email": "jeppe@j-software.dk",
    "time": "Tue Jul 17 12:28:00 2018 +0200"
  },
  "committer": {
    "name": "Grzegorz Latosinski",
    "email": "glatosinski@antmicro.com",
    "time": "Fri Nov 08 11:47:18 2019 +0100"
  },
  "message": "Made switch_name optional.\nAdded the metadata tags.\nMoved pack_pattern to subtags of interconnect.\nFlattened types in routing_resource.xsd.\n\nSigned-off-by: Jeppe Johansen \u003cjeppe@j-software.dk\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "3656cdfc000ea8931c415d8e1dce32aff1667b82",
      "old_mode": 33188,
      "old_path": "fpga_architecture.xsd",
      "new_id": "682cd06311f4b2c0c3869030cc95f8195898e8c5",
      "new_mode": 33188,
      "new_path": "fpga_architecture.xsd"
    },
    {
      "type": "modify",
      "old_id": "82314a2a5dc09204392571117eb6628fd61c6add",
      "old_mode": 33188,
      "old_path": "routing_resource.xsd",
      "new_id": "c8c689adf47006fce41a2aa29d9a4b8960f3f37e",
      "new_mode": 33188,
      "new_path": "routing_resource.xsd"
    }
  ]
}