)]}'
{
  "commit": "24403f9f705ba8d41ee925899b5dc305eea943c3",
  "tree": "99e2d4b32aa450ccf8c1c140194ac494eb2b4234",
  "parents": [
    "333775c1a7d4342418ed7a2b6b78e37ec46008f5"
  ],
  "author": {
    "name": "Tim \u0027mithro\u0027 Ansell",
    "email": "me@mith.ro",
    "time": "Tue May 21 00:32:21 2019 -0700"
  },
  "committer": {
    "name": "Grzegorz Latosinski",
    "email": "glatosinski@antmicro.com",
    "time": "Fri Nov 08 11:47:18 2019 +0100"
  },
  "message": "xml: Adding Cinternal to XML schema.\n\nSigned-off-by: Tim \u0027mithro\u0027 Ansell \u003cme@mith.ro\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0f844ea0810cdb27b4be31179e6795cbf6f7a42b",
      "old_mode": 33188,
      "old_path": "fpga_architecture.xsd",
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      "new_mode": 33188,
      "new_path": "fpga_architecture.xsd"
    },
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      "type": "modify",
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      "old_path": "routing_resource.xsd",
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}