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foss-fpga-tools/vtr-xml-utils/5e1d5ea6da9e4224b428ea1c65dc9670de1baf59
commit
5e1d5ea6da9e4224b428ea1c65dc9670de1baf59
[log]
author
Tim 'mithro' Ansell <me@mith.ro>
Wed May 22 16:38:30 2019 -0700
committer
Grzegorz Latosinski <glatosinski@antmicro.com>
Fri Nov 08 16:07:06 2019 +0100
tree
3f93c3a7f0c7176c6cd7cfd1c90785b955e14dd4
parent
c63f255ee339253979a5bf3e19faabb3bfff1406 [diff]
xml: Better whitespace output and other cleanup.

 * Don't touch existing stuff which already has a parent.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
3 files changed
tree: 3f93c3a7f0c7176c6cd7cfd1c90785b955e14dd4
  1. .gitignore/
  2. vtr_xml_utils/
  3. attribute-cleanup.golden.xml
  4. attribute-cleanup.xml
  5. CMakeLists.txt
  6. CODE_OF_CONDUCT.md
  7. composable-interconnect-existing-fasm-mux.golden.xml
  8. composable-interconnect-existing-fasm-mux.xml
  9. composable-interconnect-fasm-mux-levels.golden.xml
  10. composable-interconnect-fasm-mux-levels.xml
  11. composable-interconnect-fasm-mux.golden.xml
  12. composable-interconnect-fasm-mux.xml
  13. composable-interconnect-implicit-parent.golden.xml
  14. composable-interconnect-implicit-parent.xml
  15. composable-interconnect-pack_patterns.golden.xml
  16. composable-interconnect-pack_patterns.xml
  17. composable-loc-implicit-parent.golden.xml
  18. composable-loc-implicit-parent.xml
  19. CONTRIBUTING.md
  20. COPYING
  21. explicit-port.golden.xml
  22. explicit-port.xml
  23. full-test-inner.xml
  24. full-test.golden.xml
  25. full-test.xml
  26. MANIFEST.in
  27. pack_pattern-copy-direct-ports.golden.xml
  28. pack_pattern-copy-direct-ports.xml
  29. pack_pattern-merge-type-into-name.golden.xml
  30. pack_pattern-merge-type-into-name.xml
  31. pack_pattern-strip-from-pb_type-ports.golden.xml
  32. pack_pattern-strip-from-pb_type-ports.xml
  33. preserve-interconnect.golden.xml
  34. preserve-interconnect.xml
  35. README.md
  36. setup.cfg
  37. setup.py
  38. tox.ini
  39. xsl_tests.cmake
README.md

Utilities for working with VtR XML Files

This repository contains utilities for working with Verilog to Routing XML files.