commit | 08de4253010caa64ded6fecdc2128738c3104272 | [log] [tgz] |
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author | Tomasz Michalak <tmichalak@antmicro.com> | Mon Sep 07 12:35:26 2020 +0200 |
committer | Tomasz Michalak <tmichalak@antmicro.com> | Mon Sep 07 12:35:26 2020 +0200 |
tree | 5e40c6d4c8e53a6d01c57928b4004b7e277d57b8 | |
parent | cbe5c2b654262f9dca9ebee0577d79eb84935542 [diff] |
Parse never_prune model attribute Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
This repository contains utilities for working with Verilog to Routing XML files.