tree 7c427150de5d1f9bfed5cf69af97605909cfe217
parent a5a59ed95f5473d049d232b8ee93186b4ae8c8c8
parent 681aa553c80b3a0daa00c49a421f8316ac2c3d56
author Kamil Rakoczy <krakoczy@antmicro.com> 1675870868 +0100
committer GitHub <noreply@github.com> 1675870868 +0100
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Merge pull request #451 from antmicro/kr/casez

systemverilog-plugin: add support for case type