)]}'
{
  "commit": "0a91e20154e2e7c0d83e22e09cd570233c74b5d1",
  "tree": "254b406838c22d0c406673c66b2da497b69f634b",
  "parents": [
    "e0a923cc0bf6b2149994857ba47dc71c5791f227",
    "f53aff89c65d03bbbb552808a5f128f9d9bbe703"
  ],
  "author": {
    "name": "wsipak",
    "email": "48583927+wsipak@users.noreply.github.com",
    "time": "Wed Mar 22 21:52:49 2023 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Mar 22 21:52:49 2023 +0100"
  },
  "message": "Merge pull request #468 from antmicro/wsip/reduce_expr\n\nReduce expressions in logic typespecs",
  "tree_diff": []
}