)]}'
{
  "commit": "0ad1af26a29243a9e76379943d735e119dcd0cc6",
  "tree": "c7949fa355019b342ecc5d48dd90e745b6b6113a",
  "parents": [
    "c8d2d149861e7981745a667b502191daf96aaf69",
    "6c2a301942220dfcb7d2969a5a57cc3dc97fb65e"
  ],
  "author": {
    "name": "Mariusz Glebocki",
    "email": "mglebocki@antmicro.com",
    "time": "Tue Jun 13 15:24:03 2023 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Tue Jun 13 15:24:03 2023 +0200"
  },
  "message": "Merge pull request #530 from antmicro/mglb/FixLeaks\n\nsystemverilog-plugin: Fix few ASAN issues",
  "tree_diff": []
}