tree c5142269cff8dfa2556accb8e893c428a0911915
parent 60fc56f592333e588b5f3e5841f19112641e9ca1
author Kamil Rakoczy <krakoczy@antmicro.com> 1680696433 +0200
committer Kamil Rakoczy <krakoczy@antmicro.com> 1681202403 +0200

systemverilog-plugin: apply custom simplification step to wiretype while resolving wiretype

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>