)]}'
{
  "commit": "1a3724ab49dcd0ee50f68fc3a8f1ad1758e0dbd7",
  "tree": "2901c6158c84b9d5238fd03f6c654ea4c3297dab",
  "parents": [
    "0166c4720ea2ee90212daac069d79d55c42d0627"
  ],
  "author": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Wed Mar 22 10:16:50 2023 +0100"
  },
  "committer": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Tue Mar 28 09:36:28 2023 +0200"
  },
  "message": "systemverilog-plugin: apply review comments\n\nSigned-off-by: Kamil Rakoczy \u003ckrakoczy@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c7ed80a534efff7ff1f604efa3939b816308c392",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
      "new_id": "9c89170038a2e7a2f8fac7b0eef4fc5ce54bd31a",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.cc"
    }
  ]
}