tree 9a85594814232058a1318bfab56895d027ae4a94
parent 94d267daca1eb0cc80c97c420f3138144d2490b8
author Kamil Rakoczy <krakoczy@antmicro.com> 1680696065 +0200
committer Kamil Rakoczy <krakoczy@antmicro.com> 1681202263 +0200

systemverilog-plugin: fix sometimes wrong handle of ranges in port wire

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>