tree 2ff3a4106435058881ef1a36811f8db8dc8f1721
parent 730146f49eeae9021d31fae0f39b1e3568879b44
parent f85cd18a3593e50c1079cd492691a54aa96fb878
author Kamil Rakoczy <krakoczy@antmicro.com> 1684481022 +0200
committer GitHub <noreply@github.com> 1684481022 +0200
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Merge pull request #518 from antmicro/kr/split_line_column

systemverilog-plugin: split line and column in uhdmast_assert_log