)]}'
{
  "commit": "3a066ee57df3863a7f18cd2bec78efa7637a6e4b",
  "tree": "56a6429d0414c9ba2d141891d944d88b1eb63050",
  "parents": [
    "08430ec4f53d1cf9d6a2091211d6c5ce501d5486"
  ],
  "author": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Wed Feb 08 14:57:02 2023 +0100"
  },
  "committer": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Thu Feb 09 14:50:35 2023 +0100"
  },
  "message": "systemverilog-plugin: move handle of list op to process_case_item\n\nSigned-off-by: Kamil Rakoczy \u003ckrakoczy@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7bc9298e5970537578fc76e962de1806dfa813e7",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
      "new_id": "4b5ced1e7e5ec091d83a719509dc6c9f7de6edd5",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.cc"
    }
  ]
}
