commit 40a1431dc8e5ce19434b774c88497bc05e6bf67a
author Rafal Kapuscik <54976862+rkapuscik@users.noreply.github.com> Thu Mar 24 09:04:32 2022 +0100
committer GitHub <noreply@github.com> Thu Mar 24 09:04:32 2022 +0100
tree 1b1c9d84fbaa7ce1657ec0163ad527f3304b3219
parent 91f7ff56a5c2d1c2edd7bdaeef3a716c47258f56
parent 7a4287803db6eb45cb3c954e09eccd30b5fb4ea5

Merge pull request #280 from antmicro/union-var

Handle vpiUnionVar

systemverilog-plugin/UhdmAst.cc

diff --git a/systemverilog-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc
index 3f6f148..64a0168 100644
--- a/systemverilog-plugin/UhdmAst.cc
+++ b/systemverilog-plugin/UhdmAst.cc
@@ -1879,7 +1879,7 @@
         delete node;
     });
     auto type = vpi_get(vpiType, obj_h);
-    if (type == vpiEnumVar || type == vpiStructVar) {
+    if (type == vpiEnumVar || type == vpiStructVar || type == vpiUnionVar) {
         visit_default_expr(obj_h);
     }
     current_node->is_custom_type = true;
@@ -3510,6 +3510,7 @@
         case vpiStructNet:
         case vpiArrayNet:
         case vpiStructVar:
+        case vpiUnionVar:
         case vpiEnumVar:
         case vpiShortIntVar:
         case vpiIntVar:
@@ -3770,6 +3771,7 @@
     case vpiEnumNet:
     case vpiStructVar:
     case vpiStructNet:
+    case vpiUnionVar:
         process_custom_var();
         break;
     case vpiShortIntVar: