/*
 *  yosys -- Yosys Open SYnthesis Suite
 *
 *  Copyright (C) 2022 Antmicro
 *
 *  Permission to use, copy, modify, and/or distribute this software for any
 *  purpose with or without fee is hereby granted, provided that the above
 *  copyright notice and this permission notice appear in all copies.
 *
 *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */
#include "kernel/log.h"

USING_YOSYS_NAMESPACE

PRIVATE_NAMESPACE_BEGIN

struct UhdmDummy {
    UhdmDummy()
    {
        log("\n");
        log("!! DEPRECATION WARNING !!\n");
        log("\n");
        log("The uhdm plugin has been renamed to systemverilog.\n");
        log("Loading the systemverilog plugin...\n");

        std::vector<std::string> plugin_aliases;
        load_plugin("systemverilog", plugin_aliases);
    }
} UhdmDummy;

PRIVATE_NAMESPACE_END