)]}'
{
  "commit": "42c2a2e21b7fdcbe10c805e155a1c2824b67e34b",
  "tree": "967687f05b784aeb0cf1e65c778afaebaceb7908",
  "parents": [
    "4ad4106e693d0af0166b360b0e0e70d70c44568e"
  ],
  "author": {
    "name": "Mariusz Glebocki",
    "email": "mglebocki@antmicro.com",
    "time": "Mon May 08 12:19:01 2023 +0200"
  },
  "committer": {
    "name": "Mariusz Glebocki",
    "email": "mglebocki@antmicro.com",
    "time": "Mon May 08 12:19:01 2023 +0200"
  },
  "message": "Add comments.\n",
  "tree_diff": [
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
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}