)]}'
{
  "commit": "47c71ac99e57be8f92184b0941e5b96b4bca7cc3",
  "tree": "da51a9c8f72ddca7dd0a64f7e8f66eeeecd6cc4e",
  "parents": [
    "5c7d58ae6332c5cba312bccfaaf04b204570f157"
  ],
  "author": {
    "name": "Tomasz Gorochowik",
    "email": "tgorochowik@antmicro.com",
    "time": "Wed Mar 16 15:18:42 2022 +0100"
  },
  "committer": {
    "name": "Tomasz Gorochowik",
    "email": "tgorochowik@antmicro.com",
    "time": "Wed Mar 16 15:20:26 2022 +0100"
  },
  "message": "Force -parse flag for Surelog when reading Verilog directly\n\nSigned-off-by: Tomasz Gorochowik \u003ctgorochowik@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ce7977249c9d7b794024f3da538ea66a91c2cacb",
      "old_mode": 33188,
      "old_path": "uhdm-plugin/uhdmsurelogastfrontend.cc",
      "new_id": "24bcbb1a3e2dc2134ebe864c52555e85d4b3bf7c",
      "new_mode": 33188,
      "new_path": "uhdm-plugin/uhdmsurelogastfrontend.cc"
    }
  ]
}