SDC: Add include_propagated_clocks switch Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
diff --git a/sdc-plugin/sdc.cc b/sdc-plugin/sdc.cc index dd058d9..9f92b48 100644 --- a/sdc-plugin/sdc.cc +++ b/sdc-plugin/sdc.cc
@@ -67,20 +67,33 @@ void help() override { log("\n"); - log(" write_sdc <filename>\n"); + log(" write_sdc [-include_propagated_clocks] <filename>\n"); log("\n"); log("Write SDC file.\n"); log("\n"); + log(" -include_propagated_clocks\n"); + log(" Write out all propagated clocks"); + log("\n"); } void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) override { + size_t argidx; + bool include_propagated = false; if (args.size() < 2) { log_cmd_error("Missing output file.\n"); } + for (argidx = 1; argidx < args.size(); argidx++) { + std::string arg = args[argidx]; + if (arg == "-include_propagated_clocks" && argidx + 1 < args.size()) { + include_propagated = true; + continue; + } + break; + } log("\nWriting out clock constraints file(SDC)\n"); - extra_args(f, filename, args, 1); - sdc_writer_.WriteSdc(design, *f); + extra_args(f, filename, args, argidx); + sdc_writer_.WriteSdc(design, *f, include_propagated); } SdcWriter &sdc_writer_;
diff --git a/sdc-plugin/sdc_writer.cc b/sdc-plugin/sdc_writer.cc index ed283a6..7004f47 100644 --- a/sdc-plugin/sdc_writer.cc +++ b/sdc-plugin/sdc_writer.cc
@@ -31,15 +31,15 @@ clock_groups_.Add(clock_group, relation); } -void SdcWriter::WriteSdc(RTLIL::Design *design, std::ostream &file) +void SdcWriter::WriteSdc(RTLIL::Design *design, std::ostream &file, bool include_propagated) { - WriteClocks(design, file); + WriteClocks(design, file, include_propagated); WriteFalsePaths(file); WriteMaxDelay(file); WriteClockGroups(file); } -void SdcWriter::WriteClocks(RTLIL::Design *design, std::ostream &file) +void SdcWriter::WriteClocks(RTLIL::Design *design, std::ostream &file, bool include_propagated) { for (auto &clock : Clocks::GetClocks(design)) { auto &clock_wire = clock.second; @@ -48,7 +48,7 @@ continue; } // Write out only GENERATED and EXPLICIT clocks - if (Clock::IsPropagated(clock_wire)) { + if (Clock::IsPropagated(clock_wire) and !include_propagated) { continue; } file << "create_clock -period " << Clock::Period(clock_wire);
diff --git a/sdc-plugin/sdc_writer.h b/sdc-plugin/sdc_writer.h index ec503a7..224f18a 100644 --- a/sdc-plugin/sdc_writer.h +++ b/sdc-plugin/sdc_writer.h
@@ -59,10 +59,10 @@ void AddFalsePath(FalsePath false_path); void SetMaxDelay(TimingPath timing_path); void AddClockGroup(ClockGroups::ClockGroup clock_group, ClockGroups::ClockGroupRelation relation); - void WriteSdc(RTLIL::Design *design, std::ostream &file); + void WriteSdc(RTLIL::Design *design, std::ostream &file, bool include_propagated); private: - void WriteClocks(RTLIL::Design *design, std::ostream &file); + void WriteClocks(RTLIL::Design *design, std::ostream &file, bool include_propagated); void WriteFalsePaths(std::ostream &file); void WriteMaxDelay(std::ostream &file); void WriteClockGroups(std::ostream &file);