systemverilog-plugin: visit only topPackages
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
diff --git a/systemverilog-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc
index 41ff2aa..d39e88f 100644
--- a/systemverilog-plugin/UhdmAst.cc
+++ b/systemverilog-plugin/UhdmAst.cc
@@ -1676,13 +1676,12 @@
void UhdmAst::process_design()
{
current_node = make_ast_node(AST::AST_DESIGN);
- visit_one_to_many(
- {UHDM::uhdmallInterfaces, UHDM::uhdmallPackages, UHDM::uhdmtopPackages, UHDM::uhdmallModules, UHDM::uhdmtopModules, vpiTaskFunc}, obj_h,
- [&](AST::AstNode *node) {
- if (node) {
- shared.top_nodes[node->str] = node;
- }
- });
+ visit_one_to_many({UHDM::uhdmallInterfaces, UHDM::uhdmtopPackages, UHDM::uhdmallModules, UHDM::uhdmtopModules, vpiTaskFunc}, obj_h,
+ [&](AST::AstNode *node) {
+ if (node) {
+ shared.top_nodes[node->str] = node;
+ }
+ });
visit_one_to_many({vpiParameter, vpiParamAssign}, obj_h, [&](AST::AstNode *node) {});
visit_one_to_many({vpiTypedef}, obj_h, [&](AST::AstNode *node) {
if (node)
