)]}'
{
  "commit": "544588778e7b51d38ef46761a62d9efa71ed0ea7",
  "tree": "4d38c8b2d8c2718b471be3ad744aac83781dcce8",
  "parents": [
    "345fe14ee26f9de64170fffb00d7229ac6fe1864"
  ],
  "author": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Wed Feb 15 12:56:59 2023 +0100"
  },
  "committer": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Wed Feb 15 13:04:59 2023 +0100"
  },
  "message": "systemverilog-plugin: visit only topPackages\n\nSigned-off-by: Kamil Rakoczy \u003ckrakoczy@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "41ff2aaf3527ca25deb0ad8c42ac955a014139d1",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
      "new_id": "d39e88f9389a82affe40cdb7e0eda8eb88d1a6ce",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.cc"
    }
  ]
}