tree d69f6b268acefe191434f1b11d79463bee2ca906
parent 45781feffd33b87b6c111728eb0456749a218888
author Robert Szczepanski <rszczepanski@antmicro.com> 1670425927 +0100
committer Robert Szczepanski <rszczepanski@antmicro.com> 1673620187 +0100

systemverilog: Fix memory inference