)]}'
{
  "commit": "68dcbae145d22115999aed5e996b7ab89c908731",
  "tree": "3addcbbdb1063d81b6212da73faf69fe5c283107",
  "parents": [
    "d5602a1f19872066c89fa0749e75a233ea0319f0"
  ],
  "author": {
    "name": "Magdalena Andrys",
    "email": "mandrys@antmicro.com",
    "time": "Fri Mar 24 14:50:56 2023 +0100"
  },
  "committer": {
    "name": "Magdalena Andrys",
    "email": "mandrys@antmicro.com",
    "time": "Wed Apr 05 15:57:50 2023 +0200"
  },
  "message": "systemverilog-plugin: Rename plugin\u0027s simplify to simplify_sv\n\nSigned-off-by: Magdalena Andrys \u003cmandrys@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e52d75d88f3d79c0da8ca1156bfcd3eb7bbdce8c",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
      "new_id": "e2f173d860e20ca40a39b454b9ff90cfe5fd459f",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.cc"
    }
  ]
}