)]}'
{
  "commit": "6b619a4cb1e156f5b6048d78f008b9ac59f5fc1c",
  "tree": "c153ffc95784ca789af6d19f19a07a29b760d176",
  "parents": [
    "3235612c0c9a5091398a907552040f1de62c0fa5",
    "96150ae7320bc43d62cdf7a16da87302dc258c7b"
  ],
  "author": {
    "name": "Youssef Kandil",
    "email": "youssefkandil@aucegypt.edu",
    "time": "Sat Jan 14 23:57:48 2023 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Sat Jan 14 23:57:48 2023 +0200"
  },
  "message": "Merge branch \u0027chipsalliance:main\u0027 into clock_gating\n",
  "tree_diff": []
}