process_assignment: Use define for op type in case of simple assignment
diff --git a/systemverilog-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc index 1ca30eb..d4c0b6b 100644 --- a/systemverilog-plugin/UhdmAst.cc +++ b/systemverilog-plugin/UhdmAst.cc
@@ -2271,7 +2271,7 @@ AST::AstNodeType node_type; current_node = make_ast_node(type); - if (op_type && op_type != 82) { + if (op_type && op_type != vpiAssignmentOp) { simple_assign = false; visit_one_to_one({vpiLhs}, obj_h, [&](AST::AstNode *node) { if (node) {