)]}'
{
  "commit": "72e32103b4476d33fc8c9e6dd5081a5bb0a4df3c",
  "tree": "e54ec1860d035fefed35f6859b362fa7a15128dc",
  "parents": [
    "f4ce6487b4fd638fef393905673b7df224916f74"
  ],
  "author": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Tue Feb 21 08:22:31 2023 +0100"
  },
  "committer": {
    "name": "Kamil Rakoczy",
    "email": "krakoczy@antmicro.com",
    "time": "Tue Feb 21 08:22:31 2023 +0100"
  },
  "message": "systemverilog-plugin: update comment\n\nSigned-off-by: Kamil Rakoczy \u003ckrakoczy@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "236fe7cc9039b2db68e007e7dbb2472500c6248e",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/UhdmAst.cc",
      "new_id": "425c8dc304f9f5da2a0110ce3d60bf1500fb27aa",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/UhdmAst.cc"
    }
  ]
}