tree d3d868d88b9e8c0f8bfd4dd95bc13a923594e0ec
parent ae92491a67fdbf77fb0c870b032edc6d3eded467
author Kamil Rakoczy <krakoczy@antmicro.com> 1677145544 +0100
committer Kamil Rakoczy <krakoczy@antmicro.com> 1677578961 +0100

systemverilog-plugin: fix wires not starting from 0

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>