)]}'
{
  "commit": "8c0a30872cd3d33041b4cf4168f0f6974174be50",
  "tree": "8527db8e631d037541ac9b3ddc57e8071d3e3b87",
  "parents": [
    "85eee9195fe6d03a1a8c0999b775aa3007c11a67"
  ],
  "author": {
    "name": "Mariusz Glebocki",
    "email": "mglebocki@antmicro.com",
    "time": "Sun Nov 20 14:09:54 2022 +0100"
  },
  "committer": {
    "name": "Mariusz Glebocki",
    "email": "mglebocki@antmicro.com",
    "time": "Thu Nov 24 13:53:37 2022 +0100"
  },
  "message": "Fix formatting; merge CPPFLAGS into CXXFLAGS.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "1b162be0b0eafe6fa60b6e7fc3ae4f0eba36a7a4",
      "old_mode": 33188,
      "old_path": "systemverilog-plugin/Makefile",
      "new_id": "fdfcaedfbc1b720ea188ad71cd02856e2590616a",
      "new_mode": 33188,
      "new_path": "systemverilog-plugin/Makefile"
    }
  ]
}